Arm TechCon 19: On-board Memory Expansion Using CCIX-attached DRAM and Persistent Memory

By Matt Baxter October 24, 2019

The CCIX standard cache coherent interface is a high-performance, low-latency chip-to-chip interconnect. The availability of CCIX integrated directly into processors as with Arm’s Neoverse N1 SDP (System Development Platform) enables prototyping of new use cases – one such example being memory expansion and the attachment of Persistent Memory. Through an interface like CCIX, memory can be accessed using byte-addressable and cache coherent load/store semantics – just as if it were DDR-attached DRAM memory. Consequentially, databases for applications such as data analytics and transactions can be hosted completely in the expanded memory leveraging a single shared address space. Persistent Memory can also be more easily attached and scaled. At Lenovo Research, using Arm’s N1 SDP, we’ve investigated the performance of accessing memory attached over CCIX. Results from these efforts will be presented plus applications for Persistent Memory and expanded DRAM capacity will be discussed.